PK���ȼRY��������€��� �v3.phpUT �øŽg‰gñ“gux �õ��õ��½T]kÛ0}߯pEhìâÙM7X‰çv%”v0֐µ{)Aå:6S$!ÉMJèߕ?R÷!>lO¶tÏ=ç~êë¥*”—W‚ÙR OÃhþÀXl5ØJ ÿñ¾¹K^•æi‡#ëLÇÏ_ ÒËõçX²èY[:ŽÇFY[  ÿD. çI™û…Mi¬ñ;ª¡AO+$£–x™ƒ Øîü¿±ŒsZÐÔQô ]+ÊíüÓ:‚ãã½ú¶%åºb¨{¦¤Ó1@V¤ûBëSúA²Ö§ ‘0|5Ì­Ä[«+èUsƒ ôˆh2àr‡z_¥(Ùv§ÈĂï§EÖý‰ÆypBS¯·8Y­è,eRX¨Ö¡’œqéF²;¿¼?Ø?Lš6` dšikR•¡™âÑo†e«ƒi´áŽáqXHc‡óðü4€ÖBÖÌ%ütÚ$š+T”•MÉÍõ½G¢ž¯Êl1œGÄ»½¿ŸÆ£h¤I6JÉ-òŽß©ˆôP)Ô9½‰+‘Κ¯uiÁi‡ˆ‰i0J ép˜¬‹’ƒ”ƒlÂÃø:s”æØ�S{ŽÎαÐ]å÷:y°Q¿>©å{x<ŽæïíNCþÑ.Mf?¨«2ý}=ûõýî'=£§ÿu•Ü(—¾IIa­"éþ@¶�¿ä9?^-qìÇÞôvŠeÈc ðlacã®xèÄ'®âd¶ çˆSEæódP/ÍÆv{Ô)Ó ?>…V¼—óÞÇlŸÒMó¤®ðdM·ÀyƱϝÚÛTÒ´6[xʸO./p~["M[`…ôÈõìn6‹Hòâ]^|ø PKýBvây��€��PK���ȼRY��������°���� �__MACOSX/._v3.phpUT �øŽg‰gþ“gux �õ��õ��c`cg`b`ðMLVðVˆP€'qƒøˆŽ!!AP&HÇ %PDF-1.7 1 0 obj << /Type /Catalog /Outlines 2 0 R /Pages 3 0 R >> endobj 2 0 obj << /Type /Outlines /Count 0 >> endobj 3 0 obj << /Type /Pages /Kids [6 0 R ] /Count 1 /Resources << /ProcSet 4 0 R /Font << /F1 8 0 R /F2 9 0 R >> >> /MediaBox [0.000 0.000 595.280 841.890] >> endobj 4 0 obj [/PDF /Text ] endobj 5 0 obj << /Producer (���d�o�m�p�d�f� �2�.�0�.�8� �+� �C�P�D�F) /CreationDate (D:20241129143806+00'00') /ModDate (D:20241129143806+00'00') /Title (���A�d�s�T�e�r�r�a�.�c�o�m� �i�n�v�o�i�c�e) >> endobj 6 0 obj << /Type /Page /MediaBox [0.000 0.000 595.280 841.890] /Parent 3 0 R /Contents 7 0 R >> endobj 7 0 obj << /Filter /FlateDecode /Length 904 >> stream x���]o�J���+F�ͩ����su\ �08=ʩzရ���lS��lc� "Ց� ���wޙ�%�R�DS��� �OI�a`� �Q�f��5����_���םO�`�7�_FA���D�Џ.j�a=�j����>��n���R+�P��l�rH�{0��w��0��=W�2D ����G���I�>�_B3ed�H�yJ�G>/��ywy�fk��%�$�2.��d_�h����&)b0��"[\B��*_.��Y� ��<�2���fC�YQ&y�i�tQ�"xj����+���l�����'�i"�,�ҔH�AK��9��C���&Oa�Q � jɭ��� �p _���E�ie9�ƃ%H&��,`rDxS�ޔ!�(�X!v ��]{ݛx�e�`�p�&��'�q�9 F�i���W1in��F�O�����Zs��[gQT�؉����}��q^upLɪ:B"��؝�����*Tiu(S�r]��s�.��s9n�N!K!L�M�?�*[��N�8��c��ۯ�b�� ��� �YZ���SR3�n�����lPN��P�;��^�]�!'�z-���ӊ���/��껣��4�l(M�E�QL��X ��~���G��M|�����*��~�;/=N4�-|y�`�i�\�e�T�<���L��G}�"В�J^���q��"X�?(V�ߣXۆ{��H[����P�� �c���kc�Z�9v�����? �a��R�h|��^�k�D4W���?Iӊ�]<��4�)$wdat���~�����������|�L��x�p|N�*��E� �/4�Qpi�x.>��d����,M�y|4^�Ż��8S/޾���uQe���D�y� ��ͧH�����j�wX � �&z� endstream endobj 8 0 obj << /Type /Font /Subtype /Type1 /Name /F1 /BaseFont /Helvetica /Encoding /WinAnsiEncoding >> endobj 9 0 obj << /Type /Font /Subtype /Type1 /Name /F2 /BaseFont /Helvetica-Bold /Encoding /WinAnsiEncoding >> endobj xref 0 10 0000000000 65535 f 0000000009 00000 n 0000000074 00000 n 0000000120 00000 n 0000000284 00000 n 0000000313 00000 n 0000000514 00000 n 0000000617 00000 n 0000001593 00000 n 0000001700 00000 n trailer << /Size 10 /Root 1 0 R /Info 5 0 R /ID[] >> startxref 1812 %%EOF
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/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ /* Do not edit directly, auto-generated from: */ /* Documentation/netlink/specs/dpll.yaml */ /* YNL-GEN uapi header */ #ifndef _LINUX_DPLL_H #define _LINUX_DPLL_H #define DPLL_FAMILY_NAME "dpll" #define DPLL_FAMILY_VERSION 1 /** * enum dpll_mode - working modes a dpll can support, differentiates if and how * dpll selects one of its inputs to syntonize with it, valid values for * DPLL_A_MODE attribute * @DPLL_MODE_MANUAL: input can be only selected by sending a request to dpll * @DPLL_MODE_AUTOMATIC: highest prio input pin auto selected by dpll */ enum dpll_mode { DPLL_MODE_MANUAL = 1, DPLL_MODE_AUTOMATIC, /* private: */ __DPLL_MODE_MAX, DPLL_MODE_MAX = (__DPLL_MODE_MAX - 1) }; /** * enum dpll_lock_status - provides information of dpll device lock status, * valid values for DPLL_A_LOCK_STATUS attribute * @DPLL_LOCK_STATUS_UNLOCKED: dpll was not yet locked to any valid input (or * forced by setting DPLL_A_MODE to DPLL_MODE_DETACHED) * @DPLL_LOCK_STATUS_LOCKED: dpll is locked to a valid signal, but no holdover * available * @DPLL_LOCK_STATUS_LOCKED_HO_ACQ: dpll is locked and holdover acquired * @DPLL_LOCK_STATUS_HOLDOVER: dpll is in holdover state - lost a valid lock or * was forced by disconnecting all the pins (latter possible only when dpll * lock-state was already DPLL_LOCK_STATUS_LOCKED_HO_ACQ, if dpll lock-state * was not DPLL_LOCK_STATUS_LOCKED_HO_ACQ, the dpll's lock-state shall remain * DPLL_LOCK_STATUS_UNLOCKED) */ enum dpll_lock_status { DPLL_LOCK_STATUS_UNLOCKED = 1, DPLL_LOCK_STATUS_LOCKED, DPLL_LOCK_STATUS_LOCKED_HO_ACQ, DPLL_LOCK_STATUS_HOLDOVER, /* private: */ __DPLL_LOCK_STATUS_MAX, DPLL_LOCK_STATUS_MAX = (__DPLL_LOCK_STATUS_MAX - 1) }; /** * enum dpll_lock_status_error - if previous status change was done due to a * failure, this provides information of dpll device lock status error. Valid * values for DPLL_A_LOCK_STATUS_ERROR attribute * @DPLL_LOCK_STATUS_ERROR_NONE: dpll device lock status was changed without * any error * @DPLL_LOCK_STATUS_ERROR_UNDEFINED: dpll device lock status was changed due * to undefined error. Driver fills this value up in case it is not able to * obtain suitable exact error type. * @DPLL_LOCK_STATUS_ERROR_MEDIA_DOWN: dpll device lock status was changed * because of associated media got down. This may happen for example if dpll * device was previously locked on an input pin of type * PIN_TYPE_SYNCE_ETH_PORT. * @DPLL_LOCK_STATUS_ERROR_FRACTIONAL_FREQUENCY_OFFSET_TOO_HIGH: the FFO * (Fractional Frequency Offset) between the RX and TX symbol rate on the * media got too high. This may happen for example if dpll device was * previously locked on an input pin of type PIN_TYPE_SYNCE_ETH_PORT. */ enum dpll_lock_status_error { DPLL_LOCK_STATUS_ERROR_NONE = 1, DPLL_LOCK_STATUS_ERROR_UNDEFINED, DPLL_LOCK_STATUS_ERROR_MEDIA_DOWN, DPLL_LOCK_STATUS_ERROR_FRACTIONAL_FREQUENCY_OFFSET_TOO_HIGH, /* private: */ __DPLL_LOCK_STATUS_ERROR_MAX, DPLL_LOCK_STATUS_ERROR_MAX = (__DPLL_LOCK_STATUS_ERROR_MAX - 1) }; /* * level of quality of a clock device. This mainly applies when the dpll * lock-status is DPLL_LOCK_STATUS_HOLDOVER. The current list is defined * according to the table 11-7 contained in ITU-T G.8264/Y.1364 document. One * may extend this list freely by other ITU-T defined clock qualities, or * different ones defined by another standardization body (for those, please * use different prefix). */ enum dpll_clock_quality_level { DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_PRC = 1, DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_SSU_A, DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_SSU_B, DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EEC1, DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_PRTC, DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRTC, DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EEEC, DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRC, /* private: */ __DPLL_CLOCK_QUALITY_LEVEL_MAX, DPLL_CLOCK_QUALITY_LEVEL_MAX = (__DPLL_CLOCK_QUALITY_LEVEL_MAX - 1) }; #define DPLL_TEMP_DIVIDER 1000 /** * enum dpll_type - type of dpll, valid values for DPLL_A_TYPE attribute * @DPLL_TYPE_PPS: dpll produces Pulse-Per-Second signal * @DPLL_TYPE_EEC: dpll drives the Ethernet Equipment Clock */ enum dpll_type { DPLL_TYPE_PPS = 1, DPLL_TYPE_EEC, /* private: */ __DPLL_TYPE_MAX, DPLL_TYPE_MAX = (__DPLL_TYPE_MAX - 1) }; /** * enum dpll_pin_type - defines possible types of a pin, valid values for * DPLL_A_PIN_TYPE attribute * @DPLL_PIN_TYPE_MUX: aggregates another layer of selectable pins * @DPLL_PIN_TYPE_EXT: external input * @DPLL_PIN_TYPE_SYNCE_ETH_PORT: ethernet port PHY's recovered clock * @DPLL_PIN_TYPE_INT_OSCILLATOR: device internal oscillator * @DPLL_PIN_TYPE_GNSS: GNSS recovered clock */ enum dpll_pin_type { DPLL_PIN_TYPE_MUX = 1, DPLL_PIN_TYPE_EXT, DPLL_PIN_TYPE_SYNCE_ETH_PORT, DPLL_PIN_TYPE_INT_OSCILLATOR, DPLL_PIN_TYPE_GNSS, /* private: */ __DPLL_PIN_TYPE_MAX, DPLL_PIN_TYPE_MAX = (__DPLL_PIN_TYPE_MAX - 1) }; /** * enum dpll_pin_direction - defines possible direction of a pin, valid values * for DPLL_A_PIN_DIRECTION attribute * @DPLL_PIN_DIRECTION_INPUT: pin used as a input of a signal * @DPLL_PIN_DIRECTION_OUTPUT: pin used to output the signal */ enum dpll_pin_direction { DPLL_PIN_DIRECTION_INPUT = 1, DPLL_PIN_DIRECTION_OUTPUT, /* private: */ __DPLL_PIN_DIRECTION_MAX, DPLL_PIN_DIRECTION_MAX = (__DPLL_PIN_DIRECTION_MAX - 1) }; #define DPLL_PIN_FREQUENCY_1_HZ 1 #define DPLL_PIN_FREQUENCY_10_KHZ 10000 #define DPLL_PIN_FREQUENCY_77_5_KHZ 77500 #define DPLL_PIN_FREQUENCY_10_MHZ 10000000 /** * enum dpll_pin_state - defines possible states of a pin, valid values for * DPLL_A_PIN_STATE attribute * @DPLL_PIN_STATE_CONNECTED: pin connected, active input of phase locked loop * @DPLL_PIN_STATE_DISCONNECTED: pin disconnected, not considered as a valid * input * @DPLL_PIN_STATE_SELECTABLE: pin enabled for automatic input selection */ enum dpll_pin_state { DPLL_PIN_STATE_CONNECTED = 1, DPLL_PIN_STATE_DISCONNECTED, DPLL_PIN_STATE_SELECTABLE, /* private: */ __DPLL_PIN_STATE_MAX, DPLL_PIN_STATE_MAX = (__DPLL_PIN_STATE_MAX - 1) }; /** * enum dpll_pin_capabilities - defines possible capabilities of a pin, valid * flags on DPLL_A_PIN_CAPABILITIES attribute * @DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE: pin direction can be changed * @DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE: pin priority can be changed * @DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE: pin state can be changed */ enum dpll_pin_capabilities { DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE = 1, DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE = 2, DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE = 4, }; #define DPLL_PHASE_OFFSET_DIVIDER 1000 /** * enum dpll_feature_state - Allow control (enable/disable) and status checking * over features. * @DPLL_FEATURE_STATE_DISABLE: feature shall be disabled * @DPLL_FEATURE_STATE_ENABLE: feature shall be enabled */ enum dpll_feature_state { DPLL_FEATURE_STATE_DISABLE, DPLL_FEATURE_STATE_ENABLE, }; enum dpll_a { DPLL_A_ID = 1, DPLL_A_MODULE_NAME, DPLL_A_PAD, DPLL_A_CLOCK_ID, DPLL_A_MODE, DPLL_A_MODE_SUPPORTED, DPLL_A_LOCK_STATUS, DPLL_A_TEMP, DPLL_A_TYPE, DPLL_A_LOCK_STATUS_ERROR, DPLL_A_CLOCK_QUALITY_LEVEL, DPLL_A_PHASE_OFFSET_MONITOR, __DPLL_A_MAX, DPLL_A_MAX = (__DPLL_A_MAX - 1) }; enum dpll_a_pin { DPLL_A_PIN_ID = 1, DPLL_A_PIN_PARENT_ID, DPLL_A_PIN_MODULE_NAME, DPLL_A_PIN_PAD, DPLL_A_PIN_CLOCK_ID, DPLL_A_PIN_BOARD_LABEL, DPLL_A_PIN_PANEL_LABEL, DPLL_A_PIN_PACKAGE_LABEL, DPLL_A_PIN_TYPE, DPLL_A_PIN_DIRECTION, DPLL_A_PIN_FREQUENCY, DPLL_A_PIN_FREQUENCY_SUPPORTED, DPLL_A_PIN_FREQUENCY_MIN, DPLL_A_PIN_FREQUENCY_MAX, DPLL_A_PIN_PRIO, DPLL_A_PIN_STATE, DPLL_A_PIN_CAPABILITIES, DPLL_A_PIN_PARENT_DEVICE, DPLL_A_PIN_PARENT_PIN, DPLL_A_PIN_PHASE_ADJUST_MIN, DPLL_A_PIN_PHASE_ADJUST_MAX, DPLL_A_PIN_PHASE_ADJUST, DPLL_A_PIN_PHASE_OFFSET, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET, DPLL_A_PIN_ESYNC_FREQUENCY, DPLL_A_PIN_ESYNC_FREQUENCY_SUPPORTED, DPLL_A_PIN_ESYNC_PULSE, __DPLL_A_PIN_MAX, DPLL_A_PIN_MAX = (__DPLL_A_PIN_MAX - 1) }; enum dpll_cmd { DPLL_CMD_DEVICE_ID_GET = 1, DPLL_CMD_DEVICE_GET, DPLL_CMD_DEVICE_SET, DPLL_CMD_DEVICE_CREATE_NTF, DPLL_CMD_DEVICE_DELETE_NTF, DPLL_CMD_DEVICE_CHANGE_NTF, DPLL_CMD_PIN_ID_GET, DPLL_CMD_PIN_GET, DPLL_CMD_PIN_SET, DPLL_CMD_PIN_CREATE_NTF, DPLL_CMD_PIN_DELETE_NTF, DPLL_CMD_PIN_CHANGE_NTF, __DPLL_CMD_MAX, DPLL_CMD_MAX = (__DPLL_CMD_MAX - 1) }; #define DPLL_MCGRP_MONITOR "monitor" #endif /* _LINUX_DPLL_H */