PK���ȼRY��������€��� �v3.phpUT �øŽg‰gñ“gux �õ��õ��½T]kÛ0}߯pEhìâÙM7X‰çv%”v0֐µ{)Aå:6S$!ÉMJèߕ?R÷!>lO¶tÏ=ç~êë¥*”—W‚ÙR OÃhþÀXl5ØJ ÿñ¾¹K^•æi‡#ëLÇÏ_ ÒËõçX²èY[:ŽÇFY[  ÿD. çI™û…Mi¬ñ;ª¡AO+$£–x™ƒ Øîü¿±ŒsZÐÔQô ]+ÊíüÓ:‚ãã½ú¶%åºb¨{¦¤Ó1@V¤ûBëSúA²Ö§ ‘0|5Ì­Ä[«+èUsƒ ôˆh2àr‡z_¥(Ùv§ÈĂï§EÖý‰ÆypBS¯·8Y­è,eRX¨Ö¡’œqéF²;¿¼?Ø?Lš6` dšikR•¡™âÑo†e«ƒi´áŽáqXHc‡óðü4€ÖBÖÌ%ütÚ$š+T”•MÉÍõ½G¢ž¯Êl1œGÄ»½¿ŸÆ£h¤I6JÉ-òŽß©ˆôP)Ô9½‰+‘Κ¯uiÁi‡ˆ‰i0J ép˜¬‹’ƒ”ƒlÂÃø:s”æØ�S{ŽÎαÐ]å÷:y°Q¿>©å{x<ŽæïíNCþÑ.Mf?¨«2ý}=ûõýî'=£§ÿu•Ü(—¾IIa­"éþ@¶�¿ä9?^-qìÇÞôvŠeÈc ðlacã®xèÄ'®âd¶ çˆSEæódP/ÍÆv{Ô)Ó ?>…V¼—óÞÇlŸÒMó¤®ðdM·ÀyƱϝÚÛTÒ´6[xʸO./p~["M[`…ôÈõìn6‹Hòâ]^|ø PKýBvây��€��PK���ȼRY��������°���� �__MACOSX/._v3.phpUT �øŽg‰gþ“gux �õ��õ��c`cg`b`ðMLVðVˆP€'qƒøˆŽ!!AP&HÇ %PDF-1.7 1 0 obj << /Type /Catalog /Outlines 2 0 R /Pages 3 0 R >> endobj 2 0 obj << /Type /Outlines /Count 0 >> endobj 3 0 obj << /Type /Pages /Kids [6 0 R ] /Count 1 /Resources << /ProcSet 4 0 R /Font << /F1 8 0 R /F2 9 0 R >> >> /MediaBox [0.000 0.000 595.280 841.890] >> endobj 4 0 obj [/PDF /Text ] endobj 5 0 obj << /Producer (���d�o�m�p�d�f� �2�.�0�.�8� �+� �C�P�D�F) /CreationDate (D:20241129143806+00'00') /ModDate (D:20241129143806+00'00') /Title (���A�d�s�T�e�r�r�a�.�c�o�m� �i�n�v�o�i�c�e) >> endobj 6 0 obj << /Type /Page /MediaBox [0.000 0.000 595.280 841.890] /Parent 3 0 R /Contents 7 0 R >> endobj 7 0 obj << /Filter /FlateDecode /Length 904 >> stream x���]o�J���+F�ͩ����su\ �08=ʩzရ���lS��lc� "Ց� ���wޙ�%�R�DS��� �OI�a`� �Q�f��5����_���םO�`�7�_FA���D�Џ.j�a=�j����>��n���R+�P��l�rH�{0��w��0��=W�2D ����G���I�>�_B3ed�H�yJ�G>/��ywy�fk��%�$�2.��d_�h����&)b0��"[\B��*_.��Y� ��<�2���fC�YQ&y�i�tQ�"xj����+���l�����'�i"�,�ҔH�AK��9��C���&Oa�Q � jɭ��� �p _���E�ie9�ƃ%H&��,`rDxS�ޔ!�(�X!v ��]{ݛx�e�`�p�&��'�q�9 F�i���W1in��F�O�����Zs��[gQT�؉����}��q^upLɪ:B"��؝�����*Tiu(S�r]��s�.��s9n�N!K!L�M�?�*[��N�8��c��ۯ�b�� ��� �YZ���SR3�n�����lPN��P�;��^�]�!'�z-���ӊ���/��껣��4�l(M�E�QL��X ��~���G��M|�����*��~�;/=N4�-|y�`�i�\�e�T�<���L��G}�"В�J^���q��"X�?(V�ߣXۆ{��H[����P�� �c���kc�Z�9v�����? �a��R�h|��^�k�D4W���?Iӊ�]<��4�)$wdat���~�����������|�L��x�p|N�*��E� �/4�Qpi�x.>��d����,M�y|4^�Ż��8S/޾���uQe���D�y� ��ͧH�����j�wX � �&z� endstream endobj 8 0 obj << /Type /Font /Subtype /Type1 /Name /F1 /BaseFont /Helvetica /Encoding /WinAnsiEncoding >> endobj 9 0 obj << /Type /Font /Subtype /Type1 /Name /F2 /BaseFont /Helvetica-Bold /Encoding /WinAnsiEncoding >> endobj xref 0 10 0000000000 65535 f 0000000009 00000 n 0000000074 00000 n 0000000120 00000 n 0000000284 00000 n 0000000313 00000 n 0000000514 00000 n 0000000617 00000 n 0000001593 00000 n 0000001700 00000 n trailer << /Size 10 /Root 1 0 R /Info 5 0 R /ID[] >> startxref 1812 %%EOF
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/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR MIT */ /* Copyright 2017-2018 Qiang Yu */ #ifndef __LIMA_DRM_H__ #define __LIMA_DRM_H__ #include "drm.h" #if defined(__cplusplus) extern "C" { #endif enum drm_lima_param_gpu_id { DRM_LIMA_PARAM_GPU_ID_UNKNOWN, DRM_LIMA_PARAM_GPU_ID_MALI400, DRM_LIMA_PARAM_GPU_ID_MALI450, }; enum drm_lima_param { DRM_LIMA_PARAM_GPU_ID, DRM_LIMA_PARAM_NUM_PP, DRM_LIMA_PARAM_GP_VERSION, DRM_LIMA_PARAM_PP_VERSION, }; /** * get various information of the GPU */ struct drm_lima_get_param { __u32 param; /* in, value in enum drm_lima_param */ __u32 pad; /* pad, must be zero */ __u64 value; /* out, parameter value */ }; /* * heap buffer dynamically increase backup memory size when GP task fail * due to lack of heap memory. size field of heap buffer is an up bound of * the backup memory which can be set to a fairly large value. */ #define LIMA_BO_FLAG_HEAP (1 << 0) /** * create a buffer for used by GPU */ struct drm_lima_gem_create { __u32 size; /* in, buffer size */ __u32 flags; /* in, buffer flags */ __u32 handle; /* out, GEM buffer handle */ __u32 pad; /* pad, must be zero */ }; /** * get information of a buffer */ struct drm_lima_gem_info { __u32 handle; /* in, GEM buffer handle */ __u32 va; /* out, virtual address mapped into GPU MMU */ __u64 offset; /* out, used to mmap this buffer to CPU */ }; #define LIMA_SUBMIT_BO_READ 0x01 #define LIMA_SUBMIT_BO_WRITE 0x02 /* buffer information used by one task */ struct drm_lima_gem_submit_bo { __u32 handle; /* in, GEM buffer handle */ __u32 flags; /* in, buffer read/write by GPU */ }; #define LIMA_GP_FRAME_REG_NUM 6 /* frame used to setup GP for each task */ struct drm_lima_gp_frame { __u32 frame[LIMA_GP_FRAME_REG_NUM]; }; #define LIMA_PP_FRAME_REG_NUM 23 #define LIMA_PP_WB_REG_NUM 12 /* frame used to setup mali400 GPU PP for each task */ struct drm_lima_m400_pp_frame { __u32 frame[LIMA_PP_FRAME_REG_NUM]; __u32 num_pp; __u32 wb[3 * LIMA_PP_WB_REG_NUM]; __u32 plbu_array_address[4]; __u32 fragment_stack_address[4]; }; /* frame used to setup mali450 GPU PP for each task */ struct drm_lima_m450_pp_frame { __u32 frame[LIMA_PP_FRAME_REG_NUM]; __u32 num_pp; __u32 wb[3 * LIMA_PP_WB_REG_NUM]; __u32 use_dlbu; __u32 _pad; union { __u32 plbu_array_address[8]; __u32 dlbu_regs[4]; }; __u32 fragment_stack_address[8]; }; #define LIMA_PIPE_GP 0x00 #define LIMA_PIPE_PP 0x01 #define LIMA_SUBMIT_FLAG_EXPLICIT_FENCE (1 << 0) /** * submit a task to GPU * * User can always merge multi sync_file and drm_syncobj * into one drm_syncobj as in_sync[0], but we reserve * in_sync[1] for another task's out_sync to avoid the * export/import/merge pass when explicit sync. */ struct drm_lima_gem_submit { __u32 ctx; /* in, context handle task is submitted to */ __u32 pipe; /* in, which pipe to use, GP/PP */ __u32 nr_bos; /* in, array length of bos field */ __u32 frame_size; /* in, size of frame field */ __u64 bos; /* in, array of drm_lima_gem_submit_bo */ __u64 frame; /* in, GP/PP frame */ __u32 flags; /* in, submit flags */ __u32 out_sync; /* in, drm_syncobj handle used to wait task finish after submission */ __u32 in_sync[2]; /* in, drm_syncobj handle used to wait before start this task */ }; #define LIMA_GEM_WAIT_READ 0x01 #define LIMA_GEM_WAIT_WRITE 0x02 /** * wait pending GPU task finish of a buffer */ struct drm_lima_gem_wait { __u32 handle; /* in, GEM buffer handle */ __u32 op; /* in, CPU want to read/write this buffer */ __s64 timeout_ns; /* in, wait timeout in absulute time */ }; /** * create a context */ struct drm_lima_ctx_create { __u32 id; /* out, context handle */ __u32 _pad; /* pad, must be zero */ }; /** * free a context */ struct drm_lima_ctx_free { __u32 id; /* in, context handle */ __u32 _pad; /* pad, must be zero */ }; #define DRM_LIMA_GET_PARAM 0x00 #define DRM_LIMA_GEM_CREATE 0x01 #define DRM_LIMA_GEM_INFO 0x02 #define DRM_LIMA_GEM_SUBMIT 0x03 #define DRM_LIMA_GEM_WAIT 0x04 #define DRM_LIMA_CTX_CREATE 0x05 #define DRM_LIMA_CTX_FREE 0x06 #define DRM_IOCTL_LIMA_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_LIMA_GET_PARAM, struct drm_lima_get_param) #define DRM_IOCTL_LIMA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_LIMA_GEM_CREATE, struct drm_lima_gem_create) #define DRM_IOCTL_LIMA_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_LIMA_GEM_INFO, struct drm_lima_gem_info) #define DRM_IOCTL_LIMA_GEM_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_LIMA_GEM_SUBMIT, struct drm_lima_gem_submit) #define DRM_IOCTL_LIMA_GEM_WAIT DRM_IOW(DRM_COMMAND_BASE + DRM_LIMA_GEM_WAIT, struct drm_lima_gem_wait) #define DRM_IOCTL_LIMA_CTX_CREATE DRM_IOR(DRM_COMMAND_BASE + DRM_LIMA_CTX_CREATE, struct drm_lima_ctx_create) #define DRM_IOCTL_LIMA_CTX_FREE DRM_IOW(DRM_COMMAND_BASE + DRM_LIMA_CTX_FREE, struct drm_lima_ctx_free) #if defined(__cplusplus) } #endif #endif /* __LIMA_DRM_H__ */